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Alex Agulyansky avatar
Name:
Alex Agulyansky
Username:
alex
Location:
Vancouver, BC, Canada
Organization:
PRIZ Guru, Inc.
Contribution:
Updated 03/27/2024
8
Project Poster | Wafer cleaning issues in the wet process

Wet cleaning is widely used in microchip manufacturing. Single wafer equipment is working as follows. A wafer rotates, and chemistry is poured from a movable nozzle. Water rinsing is performed at the end of the process. Loading of a new batch of the chemistry resulted in excursion - a strongly increased amount of defects was observed on the wafer after the processing. The project is dedicated to the failure analysis and creation of innovative solutions.

Updated 03/16/2024
10
Project Poster | Diffusion furnace - Process Functional Modeling (PFM)

The process is related to microelectronics - microchip manufacturing. The purpose of the process is to create a SiO2 layer on the surface of a Si wafer. Equipment: Vertical furnace to heat the wafers in the Q2 atmosphere and perform oxidation on the wafer surface. Process: The oxidation occurs on the front side and on the back side of the wafer Requirements: Create a SiO2 thin layer with a certain thickness and low sigma - low standard deviation of the thickness between the wafers and within the wafer Failure: Wafers from the lower zone have higher thickness and significantly higher within wafer sigma (standard deviation of the thickness within the wafer)

Updated 11/28/2023
3
Project Poster | Why a fine wafer filter can result in problems

The number of particles is a critical parameter for microchip manufacturing. Each, even a very small particle, can potentially destroy a die. Therefore filters are widely used. Water is always filtered through fine filters to reduce the number of particles. Nevertheless, if the filter is too fine, it could cause a problem. This issue was investigated with the help of Functional Modeling. Possible solutions were generated using 40 Inventive Principles.

Updated 09/23/2023
2
Project Poster | Time-depending yield degradation at microchip manufacturing

The project was dedicated to production yield improvement in microchip manufacturing. The bumps are created on the top of a wafer and used for the final test of all dies. Only good dies are taken for the packaging. All dies that fail the test will be scrapped. The process yield depends on the amount of "good" and "bad" dies. It was revealed that in some cases, the time between the end of the process and the final test impacts the yield. The longer the dwelling, the more dies fail the final test. If the dwelling exceeds hundreds of hours, the amount of failed dies becomes dramatically high, which results in the scrapping of the whole wafer. The problem was analyzed and solved.

Updated 02/27/2023
5
Project Poster | Speeding up CI/CD processes

In our company, the CI/CD processes are very long (over 2 hours). Since this is a blocking step in the release flow it causes holdups of our fast-paced releases. Eventually, we are getting a backlog of unreleased features, which could be mitigated by releasing many things at once, but that comes with additional risks.