Consider alternative chamber/process architecture
A more radical solution is to redesign the process so the wafer is processed face down toward a shallow liquid bath. This could improve wetting, reduce air trapping, and reduce evaporation. A shallow bath may also allow fast replacement of chemistry and rinse water while keeping the wafer continuously covered by liquid.
Improve wafer wetting at the beginning of the process
The process should ensure complete replacement of air by liquid. Possible actions include pre-wet steps, lower initial rotation speed, temporary stop of wafer rotation during first dispense, optimized nozzle position, improved dispense profile, and chemical additives that improve wetting.
Reduce evaporation of chemistry and DI water
Evaporation can be reduced by controlling chamber atmosphere, humidity, pressure, temperature, exhaust rate, and process timing. The goal is to prevent the liquid film from drying too early and leaving residues or particles behind.
Prevent bubble formation and air trapping
The dispense sequence should avoid trapping air between the liquid and the wafer surface. Liquid should contact the wafer smoothly and continuously, especially in patterned areas and high-aspect-ratio features.
Control airflow inside the chamber
Airflow should not directly disturb the liquid film on the wafer. Instead of simply increasing airflow, it should be minimized, redirected, or isolated from the wafer surface while still maintaining safe vapor removal.
This project investigates radial non-uniformity of CDO low-k dielectric deposited by PECVD and its possible impact on wafer performance. Final test data indicate that faster dies are mainly located closer to the wafer center, while slower dies are more often found near the wafer periphery. The corresponding RC-delay trend also increases toward the wafer edge. The focus of the project is the capacitance component of RC-delay. CDO is expected to provide a low dielectric constant between BEOL metal lines, but the deposited film may not have uniform properties across the wafer. Near the wafer edge, the process can be influenced by different gas flow, plasma behavior, residence time, temperature, and pumping conditions. This may lead to stronger oxidation and deeper precursor decomposition near the periphery, forming CDO that is more oxygen-rich, less carbon-rich, denser, and closer in behavior to SiO₂. As a result, the dielectric constant k may increase toward the wafer edge, causing higher interline capacitance, higher RC-delay, and lower die speed. The project uses Functional Modeling to understand how PECVD chamber components and process conditions affect CDO film properties. The goal is to identify the main functional and problematic interactions and propose directions for compensation, such as radial gas-flow tuning, multi-zone showerhead design, edge compensation flow, and local plasma or temperature control.
Wet cleaning is widely used in microchip manufacturing. Single wafer equipment is working as follows. A wafer rotates, and chemistry is poured from a movable nozzle. Water rinsing is performed at the end of the process. Loading of a new batch of the chemistry resulted in excursion - a strongly increased amount of defects was observed on the wafer after the processing. The project is dedicated to the failure analysis and creation of innovative solutions.
This project investigates the nonuniform erosion of an expensive Ta sputtering target during Ta/TaN PVD. A deep racetrack groove forces target replacement while a significant amount of tantalum remains unused. Using PRIZ problem-solving tools, the project explores the system’s functions, identifies the root causes of localized erosion, and develops ways to improve target utilization without reducing deposition rate or production throughput.