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Updated 09/21/2026
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Radial CDO Non-Uniformity Causing Wafer Edge Speed Loss

Functional Modeling #

System Description for Functional Modeling: CDO PECVD Deposition

The PECVD system is used to deposit CDO — carbon-doped oxide / SiCOH low-k dielectric — on a semiconductor wafer. The purpose of the process is to form an interlayer dielectric with low dielectric constant k, good thickness uniformity, and stable electrical and mechanical properties for BEOL interconnect isolation.

The wafer is placed on a heated electrostatic chuck inside a vacuum chamber. Process gases are supplied through a showerhead/gas distribution plate located above the wafer. The gas mixture typically includes an organosilicon precursor, oxidizing gas, carrier gas, and dilution gases. RF power generates plasma between the showerhead and the wafer.

The plasma activates and decomposes the precursor molecules. Reactive fragments reach the wafer surface and form a carbon-doped silicon oxide thin film. Carbon-containing groups reduce the dielectric constant compared with pure SiO₂. Unused gases and reaction by-products are removed by the vacuum pumping system.

However, the deposited CDO film may have non-uniform properties across the wafer. The wafer center and wafer edge can experience different gas flow, residence time, plasma density, radical concentration, temperature, and pumping conditions. As a result, the film may vary not only in thickness, but also in composition, density, carbon content, oxygen content, porosity, and dielectric constant.

A key concern is that the dielectric constant may be higher closer to the wafer periphery. One possible mechanism is related to the influence of the vacuum pump and exhaust flow, which may affect the process more strongly near the wafer edge. The edge region may experience faster or deeper precursor decomposition and stronger oxidation. In this case, the CDO film near the periphery can become more oxygen-rich and less carbon-rich.

This is important because the closer the film composition becomes to SiO₂, the higher its dielectric constant becomes. Therefore:

More oxidized CDO → lower carbon content → denser / more SiO₂-like film → higher k → higher capacitance → higher RC-delay

The main challenge of the system is to deposit CDO with uniform functional properties across the wafer, especially uniform k-value, because radial variation in dielectric constant can directly affect interline capacitance, RC-delay, and final die speed.

Product of the System

The product of the PECVD system is:

Wafer with deposited CDO low-k dielectric film

The quality of the product is defined by:

CDO thickness uniformity, dielectric constant uniformity, composition, carbon/oxygen balance, density, porosity, mechanical strength, leakage, and stability across the wafer.



Operational Effectiveness – OE

Effective

Ineffective

OE 1.08
Operational Perfectness - OP

Basic functions

Components

Supersystems

OP 0.21
Functional rank
Problematic rank
Silicon gaseous precursor
12
Oxidizing precursor
11
11
Plasma
9
36
Vacuum pump
7
14
Showerhead
6
Interaction by-products
5
CDO in the central zone of the wafer
5
CDO in the periphery of the wafer
5
By-product in the center
3
By-product on the periphery
3

Because the wafer edge forms a higher-k CDO, the correct direction is not only to tune chemistry globally. We need to create a radially compensated PECVD system: gas flow, plasma, temperature, pressure, residence time, and post-treatment should be different where the wafer “sees” different boundary conditions.

A good engineering formulation would be:

The edge becomes higher-k because the edge undergoes a different process: different plasma, different gas residence time, different oxidation/carbon balance, different temperature, and different ion/radical flux. Therefore, compensation must also be radial.

Sep 21 2026 8:08:51 am
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