Wafer breakage at flash heating

Wet cleaning is widely used in microchip manufacturing. Single wafer equipment is working as follows. A wafer rotates, and chemistry is poured from a movable nozzle. Water rinsing is performed at the end of the process. Loading of a new batch of the chemistry resulted in excursion - a strongly increased amount of defects was observed on the wafer after the processing. The project is dedicated to the failure analysis and creation of innovative solutions.

The process is related to microelectronics - microchip manufacturing. The purpose of the process is to create a SiO2 layer on the surface of a Si wafer. Equipment: Vertical furnace to heat the wafers in the Q2 atmosphere and perform oxidation on the wafer surface. Process: The oxidation occurs on the front side and on the back side of the wafer Requirements: Create a SiO2 thin layer with a certain thickness and low sigma - low standard deviation of the thickness between the wafers and within the wafer Failure: Wafers from the lower zone have higher thickness and significantly higher within wafer sigma (standard deviation of the thickness within the wafer)

This project applies Functional Modeling to analyze the single-wafer wet etch process in semiconductor manufacturing. The model shows that wet etch defects are not caused only by chemistry, but also by interactions between the wafer, liquid flow, air, rotation, rinsing, drying, drain, and chamber environment. Key challenges include incomplete wetting, trapped air or bubbles, residue and particle redeposition, evaporation-driven watermarks, and contamination during rinse or drying. The project identifies improvement directions such as better wafer pre-wetting, controlled airflow, reduced evaporation, optimized rinse and drying conditions, and alternative chamber concepts such as face-down processing in a shallow liquid bath.