Material waste, including silicon and other raw materials, is a significant issue in semiconductor fabrication. Developing strategies for better material utilization and recycling is key to minimizing waste and reducing costs. The paradox is that highly sophisticated semiconductor devices are often produced through relatively simple methods, leading to lengthy processing times and inflated production costs, which ultimately increase the price of the final product.
This project aims to conduct a Functional Analysis of IC interconnection (BEOL) and a Process Functional Analysis of single-layer manufacturing. We believe this analysis will help us gain a deeper understanding of the process and uncover the most promising directions for innovation.
The project will proceed in two steps:
Both analyses will provide critical insights that can inform strategies for innovative improvements and cost reduction.
Wet cleaning is widely used in microchip manufacturing. Single wafer equipment is working as follows. A wafer rotates, and chemistry is poured from a movable nozzle. Water rinsing is performed at the end of the process. Loading of a new batch of the chemistry resulted in excursion - a strongly increased amount of defects was observed on the wafer after the processing. The project is dedicated to the failure analysis and creation of innovative solutions.
The project was dedicated to production yield improvement in microchip manufacturing. The bumps are created on the top of a wafer and used for the final test of all dies. Only good dies are taken for the packaging. All dies that fail the test will be scrapped. The process yield depends on the amount of "good" and "bad" dies. It was revealed that in some cases, the time between the end of the process and the final test impacts the yield. The longer the dwelling, the more dies fail the final test. If the dwelling exceeds hundreds of hours, the amount of failed dies becomes dramatically high, which results in the scrapping of the whole wafer. The problem was analyzed and solved.
The process is related to microelectronics - microchip manufacturing. The purpose of the process is to create a SiO2 layer on the surface of a Si wafer. Equipment: Vertical furnace to heat the wafers in the Q2 atmosphere and perform oxidation on the wafer surface. Process: The oxidation occurs on the front side and on the back side of the wafer Requirements: Create a SiO2 thin layer with a certain thickness and low sigma - low standard deviation of the thickness between the wafers and within the wafer Failure: Wafers from the lower zone have higher thickness and significantly higher within wafer sigma (standard deviation of the thickness within the wafer)