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Updated 09/11/2026
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SiO2 thin film creation in Diffusion furnace - Process Functional Modeling

The process is related to microelectronics - microchip manufacturing.


The purpose of the process is to create a SiO2 layer on the surface of a Si wafer.


Equipment: Vertical furnace to heat the wafers in the Q2 atmosphere and perform oxidation on the wafer surface.


Process: The oxidation occurs on the front side and the back side of the wafer: Si (wafer) + O2 (gas within the furnace) --> SiO2 (thin film layer on the wafer surface.

The process is performed in batches of up to 150 wafers in one run.


Requirements: Create a SiO2 thin layer with a certain thickness and low sigma - low standard deviation of the thickness between the wafers and within the wafer


Failure: Wafers from the lower zone have higher thickness and significantly higher within wafer sigma (standard deviation of the thickness within the wafer)



Important note: In order to achieve better thermal uniformity, the furnace is built of three heaters that are managed differently according to data from a certain thermocouple (TC).


The project aims to analyze the system and process using Process Functional Modeling (PFM), create a model of the process, create a model of the failure, and generate a solution.

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