login
Updated 11/5/2024
11

Wafer breakage at flash heating

Cause and Effect Chain #

Wafer breakage within the flash heating system:

The flash heating with the upper lamp created the gradient of the temperature of the air. The fast-changing of temperature results in the wind (tornado) formation that leads to the movement of the wafer. The moving of the wafer may result in a mechanical hit followed by the wafer breakage.

May 29 2022 3:12:51 pm
5 Whys #
Causes Chain
Root Cause Analysis

Wafer breakage occurs at flash heating

Why?

Run additional wafers to compensate for the broken wafers

0

A mechanical hit occurs

Why?

Redesign the pedestal or add a ring having no "walls" - no parts that the wafer can hit

3

Wafer moves due to air pressure difference appearing due to flash heating

Why?

Keep the wafer static - no movements at all (vacuum keeper?)

1

The pedestal has a special configuration: the wafer moves and can get a mechanical hit

This is the fundamental reason for the problem (FRP).

Redesign the pedestal to exclude a mechanical hit

2
Jun 12 2022 1:04:05 pm
Functional Modeling #

How wafer breakage occurs while the flash heating process:

Operational Effectiveness – OE

Effective

Ineffective

OE 2.17
Operational Perfectness - OP

Basic functions

Components

Supersystems

OP 0.62
Functional rank
Problematic rank
Pedestal
10
Low lamp
7.5
Bumps
5
Centering pins
5
10
Upper light (flash)
5
Atmosphere (N2)
5

The main conclusion is that we need to exclude either movement of the wafer or vertical solid parts that the wafer can hit

Jun 12 2022 1:18:45 pm
Inventive principles #
Contradiction:
If
we exclude the wafer movement
Then
no breakage will occur due to a mechanical hit
But
The thermal stress could appear and affect the parameters of the product or even result in breakage due to thermal stress
Improving parameter
Description of what is improving:
No breakage will occur
Selected improving parameter:
Shape
Worsening parameter
Description of what is worsening:
thermal stress will occur
Selected worsening parameter:
Strength
Matching principles:
  • 10
    Preliminary action
  • 14
    Spheroidality - Curvature
  • 30
    Flexible shells and thin films
  • 40
    Composite materials
  • Jun 12 2022 1:32:07 pm
    Login to comment

    Similar projects

    The process is related to microelectronics - microchip manufacturing. The purpose of the process is to create a SiO2 layer on the surface of a Si wafer. Equipment: Vertical furnace to heat the wafers in the Q2 atmosphere and perform oxidation on the wafer surface. Process: The oxidation occurs on the front side and on the back side of the wafer Requirements: Create a SiO2 thin layer with a certain thickness and low sigma - low standard deviation of the thickness between the wafers and within the wafer Failure: Wafers from the lower zone have higher thickness and significantly higher within wafer sigma (standard deviation of the thickness within the wafer)

    Anatoly Agulyansky avatar
    Anatoly Agulyansky
    Mike Agulyansky avatar
    Alex Agulyansky avatar
    Anatoly Agulyansky avatar

    Wet cleaning is widely used in microchip manufacturing. Single wafer equipment is working as follows. A wafer rotates, and chemistry is poured from a movable nozzle. Water rinsing is performed at the end of the process. Loading of a new batch of the chemistry resulted in excursion - a strongly increased amount of defects was observed on the wafer after the processing. The project is dedicated to the failure analysis and creation of innovative solutions.

    Anatoly Agulyansky avatar
    Anatoly Agulyansky

    Semiconductor devices are becoming more complex and expensive. But what exactly are we paying for when we buy a computer, cellphone, or any device containing a microchip? It’s not for radically new functions—the core components remain the same: transistors and interconnections. According to Moore’s law, transistors are getting smaller, with more interconnection layers added, making the manufacturing process longer and more costly. In reality, we’re paying for the inability of engineers to efficiently solve engineering challenges. This project leverages System Functional Modeling (SFM) to analyze the IC interconnection layer and Process Functional Modeling (PFM) to evaluate its manufacturing process. These analyses aim to deepen our understanding of both the device and the production process, generating innovative solutions for cost reduction and improved efficiency.

    Anatoly Agulyansky avatar
    Anatoly Agulyansky
    Mike Agulyansky avatar
    Alex Agulyansky avatar