The Process Functional Modeling of the SiO2 thin film layer creation has revealed problems as follows:
Based on the concept of moving wafers, let's describe the models of the failures of bottom zone wafers' thickness sigma (thickness standard deviation)
Model 1. The loading of the boat with wafers causes overheating at the bottom zone of the furnace
During loading the wafers into the furnace (that is at 300C), the cold wafers "cool" the bottom thermocouple (TC) that resulting in strong overheating of the bottom zone.
Model 2. The Loading of the boat with wafers causes the presence of air residue in the bottom zone of the wafer.
During the loading of the wafers, the N2 flow mainly removes the air from the furnace, but some residual amount may remain and it will be collected in the bottom zone of the furnace. As a result, the wafers in the bottom zone will start oxidation earlier and will receive more O2.
Model 3. The unloading of the wafers from the furnace will result in additional uncontrolled oxidation on the bottom zone wafers
During the unloading of the boat with wafers, the bottom wafers expose to the atmosphere first. They have a higher temperature when exposed to the air and they keep the temperature longer because they are placed close to the massive bottom flange.
Possible solutions:
Semiconductor devices are becoming more complex and expensive. But what exactly are we paying for when we buy a computer, cellphone, or any device containing a microchip? It’s not for radically new functions—the core components remain the same: transistors and interconnections. According to Moore’s law, transistors are getting smaller, with more interconnection layers added, making the manufacturing process longer and more costly. In reality, we’re paying for the inability of engineers to efficiently solve engineering challenges. This project leverages System Functional Modeling (SFM) to analyze the IC interconnection layer and Process Functional Modeling (PFM) to evaluate its manufacturing process. These analyses aim to deepen our understanding of both the device and the production process, generating innovative solutions for cost reduction and improved efficiency.
Wet cleaning is widely used in microchip manufacturing. Single wafer equipment is working as follows. A wafer rotates, and chemistry is poured from a movable nozzle. Water rinsing is performed at the end of the process. Loading of a new batch of the chemistry resulted in excursion - a strongly increased amount of defects was observed on the wafer after the processing. The project is dedicated to the failure analysis and creation of innovative solutions.
The project was dedicated to production yield improvement in microchip manufacturing. The bumps are created on the top of a wafer and used for the final test of all dies. Only good dies are taken for the packaging. All dies that fail the test will be scrapped. The process yield depends on the amount of "good" and "bad" dies. It was revealed that in some cases, the time between the end of the process and the final test impacts the yield. The longer the dwelling, the more dies fail the final test. If the dwelling exceeds hundreds of hours, the amount of failed dies becomes dramatically high, which results in the scrapping of the whole wafer. The problem was analyzed and solved.