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Updated 11/3/2024
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Optimizing IC Interconnection: A Functional Approach to Innovation (Stay updated on the project's progress)

Functional Modeling of the traditional layer #

We need to create a Functional Model of IC Interconnection to understand and learn the functional and problem ranks of all components.

We will take one metal layer created above the layer below.

The purpose of the IC interconnection is to electrically connect the metal in the layer below to the metal line above. Therefore, the system's product would be Current.

The challenges are as follows:

We need a dielectric material (ILD) to be able to keep the metal line mechanically and separated electrically

ILD - Interlayer dielectric that is typically built of SiO2 or modified SiO2

The metal lines and via are made from Cu

Cu diffuses through the ILD, resulting in shortening - the creation of electrical contacts through ILD

The barrier (typically Ta) is used for preventing Cu diffusion into ILD within the layer

Etch stop layer (typically Si3N4, SiC) aims to prevent Cu diffusion to ILD on the upper layer

Cu is affected by the electromigration effect; therefore, the bottom Barrier that separates the top of the via from the metal at the low layer helps to prevent the formation of huge voids due to Cu electromigration from layer to layer

During the Functional Modeling, we need to take into account the RC-delay that affects the signal and should be as low as possible. RC-delay = R X C where R is the total resistivity of metal layers, and Vias and C is the total capacitance of vertical and horizontal gaps of dielectrics located between metal lines. The resistivity of the metal lines and metal vias should be as low as possible; the Dielectric permittivity of dielectric layers should be as low as possible.

The interconnection part is shown below:


Let's start to create a Functional Model.

Operational Effectiveness – OE

Effective

Ineffective

OE 1.76
Operational Perfectness - OP

Basic functions

Components

Supersystems

OP 0.11
Functional rank
Problematic rank
Barrier - top layer
10
10
ILD - top layer
8
2.2
Cu metal - top layer
5
1.3
Metal - bottom layer
5
Cu via - top layer
3
1
ILD - bottom layer
2
Etch stop layer
2
Barrier - bottom layer
2
0.7
Cu - diffusion
0.8
Cu electromigration voids
5

Exciting result - the most functional component for current providing is not a metal line but a component that keeps the metal line:

  • If we assign that "Barrier Keeps Metal Line" (see the basic version) - the most functional component becomes Barrier
  • If we assign that "ILD Keeps Metal Line" (next version) - the most functional component becomes ILD

The conclusion - the carrier has higher functionality than the metal line that provides electrical current.


So, we need to think about how to eliminate barriers and delegate its functions to another component - small air gaps between Cu metal lines and ILD seem to be very perspective from the standpoint of both Cu diffusion prevention and RC-delay reduction

The possible configuration can be as shown below:


The Functional Model is in the Proposed Version


The Air Gaps model seems much better and also helps to prevent void formation due to Cu electromigration - the void already exists. It might happen that due to very strong Cu-electromigration, the shape of the via and metal line will be slightly affected, but no voids will be created within the metal line or within the metal via.

Oct 13 2024 11:05:29 am
Version: Basic version, Component: Barrier - top layer #
Contradiction:
If
Barrier - top layer remains unchanged
Then
Barrier - top layer Keeps Cu metal - top layer
But
Barrier - top layer Reduces Cu metal - top layer
Improving parameter
Description of what is improving:
No diffusion of Cu or voids formation due to electromigration effect - Metal line remains unchanged
Selected improving parameter:
Shape
Worsening parameter
Description of what is worsening:
The barrier takes the volume of the via and trench therefore, the volume of the metal via and metal line becomes smaller, reducing the conductivity of the line and affecting the current as a product
Selected worsening parameter:
Loss of substance
Matching principles:
  • 3
    Local quality
  • 5
    Merging
  • 29
    Pneumatics or hydraulics
  • 35
    Parameter changes
  • Oct 18 2024 8:49:34 am
    Process Functional Modeling - Typical Process #

    The next step is to analyze the manufacturing process of the IC interconnection layer.

    Generally, we need to process the structure:


    To the structure:



    Let's analyze all the steps needed to make an additional interconnection layer. We will use very general operations of the typical process used in many fabs for manufacturing BEOL layers.

    Let's start, go to the "Model"


    We need to complete 13 sequential operations to create a metal layer.

    Generally speaking, two types of operations in semiconductor manufacturing aim to either deposit something or remove something.


    A typical reasonable process flow is shown below:


    Let's analyze the process using Process Functional Modeling, a creative thinking tool. No metrology operations were taken into account. Go to "Model"

    Step 1 Etch Stop Deposition

    3
    1.98
    OE 1.51

    Step 2 ILD Deposition

    3.27
    1.27
    OE 2.57

    Step 3 Sacrificial Layer Deposition for Via

    3.14
    2.32
    OE 1.35

    Step 4 Photolithography patterning for Via

    4.63
    1.16
    OE 4.01

    Step 5 Via Etch

    Step 6 Wet Cleaning after Via Etch

    Step 7 Sacrificial Layer Deposition for Trench

    Step 8 Photolithography Patterning for Trench

    Step 9 Trench Etch for Metal Line

    Step 10 Wet Cleaning after Trench Etch

    Step 11 Ta-Barrier + Cu-Seed layers Deposition

    Step 12 Cu Electroplating

    Step 13 Excessive Cu and Barrier Removal by Polish

    Productive operations effectiveness

    Effective

    Ineffective

    Operation types breakdown

    Productive

    Providing

    Corrective

    Metrology

    Operation TypeDoes it increase cost?Does it increase product value?Recommendation
    Productive
    YesYesImprove
    Providing
    YesNoEliminate
    Corrective
    YesNoEliminate
    Metrology
    YesNoEliminate
    OperationTypeMeritRecommendation
    Step 1 Etch Stop Deposition
    Productive
    OE 1.51
    Consider improving
    Step 2 ILD Deposition
    Productive
    OE 2.57
    Consider improving
    Step 3 Sacrificial Layer Deposition for Via
    Providing
    OE 1.35
    Consider eliminating
    Step 4 Photolithography patterning for Via
    Providing
    OE 4.01
    Consider eliminating
    Oct 19 2024 1:03:56 pm
    Step 1 Etch Stop Deposition #
    (by Process Functional Modeling - Typical Process)

    1 Step is the transformation from the structure:


    To the structure:


    The Etch Stop layer is mainly needed to preserve the Cu diffusion to the ILD of the top layer - the top barrier. It is typically made of Si3N4 or SiC because increased density is needed to ensure barrier properties against Cu diffusion.

    The Etch Stop layer deposition is usually performed by the CVD method.

    The operation aims to create the Etch Stop layer therefore, the product is the "Etch Stop Layer"

    Operational Effectiveness – OE

    Effective

    Ineffective

    OE 1.51
    Operational Perfectness - OP

    Basic functions

    Components

    Supersystems

    OP 0.18
    Functional rank
    Problematic rank
    Plasma
    10
    CVD system
    5.5
    Initial layer
    4
    Gaseous Chemicals
    3.5
    Wafer
    3
    Cu - Initial layer
    2.5
    ILD - Initial layer
    2.5
    Chuck
    2
    Vacuum pump
    10
    By-product gases
    2.6
    Air
    9.2

    It is exciting results:

    Plasma is the most functional component - we have to think about plasma for effective improvement of the process

    Vacuum pump came out as the most problematic component of the system - we have to think about how to eliminate or replace the vacuum pump - Interesting

    Oct 20 2024 10:53:40 am
    Step 2 ILD Deposition #
    (by Process Functional Modeling - Typical Process)

    2 Step is the deposition of the ILD layer - a transformation from structure:

    To structure:


    ILD is typically built of SiO2 or modified SiO2 for the reduction of dielectric permittivity. The Electric permittivity reduction is typically achieved by the creation pores and dipping with C (in the form of methyl), Fluorine

    ILD deposition is typically made by the CVD process, where gaseous components are converted into a thin solid film due to the process in plasma.


    The operation aims to deposit ILD; therefore, the product (target) of the step is ILD.

    Operational Effectiveness – OE

    Effective

    Ineffective

    OE 2.57
    Operational Perfectness - OP

    Basic functions

    Components

    Supersystems

    OP 0.23
    Functional rank
    Problematic rank
    Plasma
    10
    Gaseous chemicals
    4
    Etch Stop layer
    4
    CVD Tool
    4
    Previous layers
    2.7
    Air residue
    2.7
    10
    Vacuum pump
    2
    2
    Wafer
    2
    Chuck
    1.3
    Gaseous by-products
    0.7

    Stupid question. Why do we need a vacuum for ILD deposition? I see only one possible reason - to create a free pathway that is long enough for plasma creation. OK. We need to think about how to ensure plasma and avoid deep vacuum. ILD that is SiO2 or modifications of SiO2 do not need a vacuum. More than that, the lack of oxygen

    Oct 20 2024 10:54:15 am
    Step 3 Sacrificial Layer Deposition for Via #
    (by Process Functional Modeling - Typical Process)

    3 Step is the deposition of the Sacrificial light-absorbing Layer (SLAL). The main purpose of this layer is to absorb the light during Photolithography and prevent the formation of a standing wave due to the interference of initial reflected light.

    The structure:



    Should be converted to the structure:


    The layer is typically deposited by a spin-on procedure similar to the deposition of a photoresist.


    The operation aims to deposit SLAL; therefore, the product (target) of the operation is SLAL.

    Operational Effectiveness – OE

    Effective

    Ineffective

    OE 1.35
    Operational Perfectness - OP

    Basic functions

    Components

    Supersystems

    OP 0.21
    Functional rank
    Problematic rank
    Chamber for Spin on
    10
    ILD layer
    5
    Furnace
    5
    Liquid material for Spin on deposition
    5
    Chuck
    4
    Air Fan
    4
    Air
    3
    Nozzle for liquid material
    3
    Wafer
    3
    Exhaust
    2
    Air Filter
    7.5
    Vapor of the liquid material
    10
    Vapors of solid sacrificial material
    10
    Particles
    5

    There are too many components. It would be easier and more effective to use hot air to solidify the Sacrificial Light Absorbing Material when it is on the wafer. So, the process seems to be like this: Wafer is kept in the chuck and rotated. The liquid stuff is poured on the rated wafer, and hot air solidifies the material on the wafer. The local flow of the air will preserve the wafer from the contamination of the layer. A chamber filter and Fan will not be needed.

    Oct 20 2024 10:55:01 am
    Step 4 Photolithography patterning for Via #
    (by Process Functional Modeling - Typical Process)

    4th Step is the wafer patterning using Photolithography (PL). PL is a preparation for the next step, which is Dry Etch (Plasma Etch). The purpose of the operation is to deposit the Photo Resist (PR) and create a pattern: the areas that are covered with the PR will not be affected by the Plasma etch, and opened areas will be etched by plasma.


    Incoming structure:


    Outcoming structure after the PL process should be as follows:



    This step creates the pattern for Via etch only. The PL process generally consists of three sequential parts: deposition of the Photo Resist (PR), Exposure - optical exposing of the PR through the special mask, and Development - chemical removal of the exposed part of the PR; unexposed parts will remain on the wafer. (In the case of "negative resist, "the effect is the opposite - exposed parts will remain, while unexposed parts will be removed at the development).


    The operation aims to create a patterned photoresist; therefore, its product (target) is Via Patterned PR.

    Operational Effectiveness – OE

    Effective

    Ineffective

    OE 4.01
    Operational Perfectness - OP

    Basic functions

    Components

    Supersystems

    OP 0.09
    Functional rank
    Problematic rank
    Exposed PR
    10
    10
    Liquid Developer
    10
    Scanner
    7.5
    Wafer
    5.8
    Oven
    5.8
    Liquid PR
    5.8
    5.8
    Sacrificial Light Absorbing Layer
    5
    5
    Solid PR
    4.2
    Development Chamber
    4.2
    Dev Nozzle
    4.2
    Exposure Chamber
    4.2
    Chuck for Spin on
    3.3
    Liquid PR layer
    3.3
    PR Spin on Chamber
    2.5
    Nozzle for liquid PR
    2.5
    Dev Chuck
    1.7
    Exposure Chuck
    1.7
    ILD layer
    1.7

    Photolithography does not add value to the product. The PL operation is very complex, so there is no reason to develop the operation and equipment. The PL operation is very expensive and must be simplified and eliminated.

    The Exposed Resist is the most functional component. So, let's document some ideas for simplification of the PL process:

    1. Why do we develop within the costly PL equipment? Developing the exposed resist is just a wet etch/clean process that can be performed with regular cheap wet cleaning equipment.
    2. Why do we need to develop exposed PR at all? Exposed PR is removed by an aqueous solution, this means that it can be removed by plasma. So, the idea is to apply plasma etch directly after exposure.
    Oct 20 2024 10:56:01 am